? semiconductor components industries, llc, 2014 september, 2014 ? rev. 2 1 publication order number: nvd6495nl/d nvd6495nl n-channel power mosfet 100 v, 25 a, 50 m , logic level features ? low r ds(on) ? 100% avalanche tested ? aec?q101 qualified ? these devices are pb?free and are rohs compliant maximum ratings (t j = 25 c unless otherwise noted) parameter symbol value unit drain?to?source v oltage v dss 100 v gate?to?source voltage ? continuous v gs 20 v continuous drain current steady state t c = 25 c i d 25 a t c = 100 c 18 power dissipation steady state t c = 25 c p d 83 w pulsed drain current t p = 10 s i dm 80 a operating and storage temperature range t j , t stg ?55 to +175 c source current (body diode) i s 25 a single pulse drain?to?source avalanche energy (v dd = 50 vdc, v gs = 10 vdc, i l(pk) = 23 a, l = 0.3 mh, r g = 25 ) e as 79 mj lead temperature for soldering purposes, 1/8 from case for 10 seconds t l 260 c stresses exceeding those listed in the maximum ratings table may damage the device. if any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. thermal resistance ratings parameter symbol max unit junction?to?case (drain) ? steady state r jc 1.8 c/w junction?to?ambient ? steady state (note 1) r ja 39 1. surface mounted on fr4 board using 1 sq in pad size, (cu area 1.127 sq in [2 oz] including traces). http://onsemi.com d s g marking diagram & pin assignment 6495nl = device code y = year ww = work week g = pb?free package dpak case 369aa style 2 yww 64 95nlg 4 drain 3 source 1 gate 2 drain v (br)dss r ds(on) max i d max 100 v 50 m @ 10 v 25 a see detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet. ordering information 54 m @ 4.5 v 1 2 3 4
nvd6495nl http://onsemi.com 2 electrical characteristics (t j = 25 c unless otherwise noted) parameter symbol test condition min typ max unit off characteristics drain?to?source breakdown voltage v (br)dss v gs = 0 v, i d = 250 a v gs = 0 v, i d = 250 a, t j = ?40 c 100 92 v drain?to?source breakdown voltage temperature coefficient v (br)dss /t j 115 mv/ c zero gate voltage drain current i dss v gs = 0 v, v ds = 100 v t j = 25 c 1.0 a t j = 125 c 100 gate?to?source leakage current i gss v ds = 0 v, v gs = 20 v 100 na on characteristics (note 2) gate threshold voltage v gs(th) v gs = v ds , i d = 250 a 1.0 2.0 v negative threshold temperature coefficient v gs(th) /t j 4.8 mv/ c drain?to?source on?resistance r ds(on) v gs = 4.5 v, i d = 10 a 44 54 m v gs = 10 v, i d = 10 a 43 50 forward transconductance g fs v ds = 5.0 v, i d = 10 a 24 s charges, capacitances and gate resistance input capacitance c iss v gs = 0 v, f = 1.0 mhz, v ds = 25 v 1024 pf output capacitance c oss 156 reverse transfer capacitance c rss 70 total gate charge q g(tot) v gs = 4.5 v, v ds = 80 v, i d = 23 a 20 nc threshold gate charge q g(th) 1.1 gate?to?source charge q gs 3.1 gate?to?drain charge q gd 14 total gate charge q g(tot) v gs = 10 v, v ds = 80 v, i d = 23 a 35 nc switching characteristics (note 3) turn?on delay time t d(on) v gs = 4.5 v, v dd = 80 v, i d = 23 a, r g = 6.1 11 ns rise time t r 91 turn?off delay time t d(off) 40 fall time t f 71 drain?source diode characteristics forward diode voltage v sd v gs = 0 v, i s = 23 a t j = 25 c 0.87 1.2 v t j = 125 c 0.74 reverse recovery time t rr v gs = 0 v, di s /dt = 100 a/ s, i s = 23 a 64 ns charge time t a 40 discharge time t b 24 reverse recovery charge q rr 152 nc product parametric performance is indicated in the electrical characteristics for the listed test conditions, unless otherwise noted. product performance may not be indicated by the electrical characteristics if operated under different conditions. 2. pulse test: pulse width 300 s, duty cycle 2%. 3. switching characteristics are independent of operating junction temperatures. ordering information device package shipping ? NVD6495NLT4G dpak (pb?free) 2500 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specification brochure, brd8011/d.
nvd6495nl http://onsemi.com 3 0 5 10 15 20 25 30 35 40 45 012345 v ds , drain?to?source voltage (v) i d , drain current (a) figure 1. on?region characteristics t j = 25 c v gs = 10 v 5 v 4 v 3.6 v 3.4 v 3.2 v 3.0 v 2.8 v v gs , gate?t o?source voltage (v) i d , drain current (a) figure 2. transfer characteristics v ds 10 v t j = 125 c t j = ?55 c t j = 25 c v gs , gate?t o?source voltage (v) r ds(on) , drain?to?source resistance ( ) figure 3. on?region versus gate voltage 0.040 0.042 0.044 0.046 0.048 0.050 5 1015202 5 i d , drain current (a) figure 4. on?resistance versus drain current and gate voltage r ds(on) , drain?to?source resistance ( ) v gs = 4.5 v v gs = 10 v t j = 25 c 0.5 1.0 1.5 2.0 2.5 3.0 ?50 ?25 0 25 50 75 100 125 150 175 t j , junction temperature ( c) figure 5. on?resistance variation with temperature r ds(on) , drain?to?source resistance (normalized) i d = 23 a v gs = 4.5 v v ds , drain?to?source voltage (v) i dss , leakage (na) figure 6. drain?to?source leakage current versus voltage 100 1000 10000 10 20 30 40 50 60 70 80 90 10 0 t j = 125 c v gs = 0 v t j = 150 c 0 5 10 15 20 25 30 35 40 45 123 4 0.040 0.042 0.044 0.046 0.048 0.050 2345678910 i d = 23 a t j = 25 c
nvd6495nl http://onsemi.com 4 0 500 1000 1500 2000 2500 0 102030405060708090100 v ds , drain?to?source voltage (v) c, capacitance (pf) figure 7. capacitance variation t j = 25 c v gs = 0 v c iss c oss c rss 0 2 4 6 8 10 0 5 10 15 20 25 30 35 q g , total gate charge (nc) figure 8. gate?to?source voltage and drain?to?source voltage versus total charge v gs , gate?t o?source voltage (v) q t q ds q gs v ds = 80 v i d = 23 a t j = 25 c 1 10 100 1000 1 10 100 r g , gate resistance ( ) t, time (ns) figure 9. resistive switching time variation versus gate resistance t d(off) t f t r t d(on) v ds = 80 v i d = 23 a v gs = 4.5 v 0 5 10 15 20 25 0.50 0.55 0.60 0.65 0.70 0.75 0.80 0.85 0.90 0.95 v sd , source?to?drain voltage (v) figure 10. diode forward voltage versus current i s , source current (a) t j = 25 c v gs = 0 v 0.1 1 10 100 1 10 100 1000 v ds , drain?to?source voltage (v) i d , drain current (a) figure 11. maximum rated forward biased safe operating area r ds(on) limit thermal limit package limit v gs = 10 v single pulse t c = 25 c 10 s 100 s 10 ms dc 1 ms 0 25 50 75 100 125 25 50 75 100 125 150 175 avalanche energy (mj) t j , starting junction temperature figure 12. maximum avalanche energy versus starting junction temperature i d = 23 a
nvd6495nl http://onsemi.com 5 figure 13. thermal response t, pulse time (s) 0.02 0.2 0.01 0.05 duty cycle = 0.5 single pulse r jc(t) ( c/w) effective transient thermal resistance 0.1 0.001 0.01 0.1 1 10 0.000001 0.00001 0.0001 0.001 0.01 0.1 1 1 0
nvd6495nl http://onsemi.com 6 package dimensions dpak (single guage) case 369aa?01 issue b b d e b3 l3 l4 b2 e m 0.005 (0.13) c c2 a c c z dim min max min max millimeters inches d 0.235 0.245 5.97 6.22 e 0.250 0.265 6.35 6.73 a 0.086 0.094 2.18 2.38 b 0.025 0.035 0.63 0.89 c2 0.018 0.024 0.46 0.61 b2 0.030 0.045 0.76 1.14 c 0.018 0.024 0.46 0.61 e 0.090 bsc 2.29 bsc b3 0.180 0.215 4.57 5.46 l4 ??? 0.040 ??? 1.01 l 0.055 0.070 1.40 1.78 l3 0.035 0.050 0.89 1.27 z 0.155 ??? 3.93 ??? notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: inches. 3. thermal pad contour optional within di- mensions b3, l3 and z. 4. dimensions d and e do not include mold flash, protrusions, or burrs. mold flash, protrusions, or gate burrs shall not exceed 0.006 inches per side. 5. dimensions d and e are determined at the outermost extremes of the plastic body. 6. datums a and b are determined at datum plane h. 12 3 4 5.80 0.228 2.58 0.102 1.60 0.063 6.20 0.244 3.00 0.118 6.17 0.243 mm inches scale 3:1 *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* h 0.370 0.410 9.40 10.41 a1 0.000 0.005 0.00 0.13 l1 0.108 ref 2.74 ref l2 0.020 bsc 0.51 bsc a1 h detail a seating plane a b c l1 l h l2 gauge plane detail a rotated 90 cw style 2: pin 1. gate 2. drain 3. source 4. drain on semiconductor and the are registered trademarks of semiconductor components industries, llc (scillc) or its subsidia ries in the united states and/or other countries. scillc owns the rights to a number of pa tents, trademarks, copyrights, trade secret s, and other intellectual property. a listin g of scillc?s product/patent coverage may be accessed at www.onsemi.com/site/pdf/patent?marking.pdf. scillc reserves the right to make changes without further notice to any product s herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any part icular purpose, nor does sci llc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ?typi cal? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating param eters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the right s of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgic al implant into the body, or other applications intended to s upport or sustain life, or for any other application in which the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer s hall indemnify and hold scillc and its officers , employees, subsidiaries, affiliates, and dist ributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufac ture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. p ublication ordering information n. american technical support : 800?282?9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81?3?5817?1050 nvd6495nl/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303?675?2175 or 800?344?3860 toll free usa/canada fax : 303?675?2176 or 800?344?3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your loc al sales representative
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